Multilayer Ceramic Embedding of SiC Semiconductor Devices

Topic

© Fraunhofer IKTS
Schematic diagram for embedding a SiC semiconductor device in a pre-metallized LTCC multilayer stack.

SiC-based semiconductors are currently used in the form of diodes and transistors. In conventional assembly and connection technology, the semiconductor is soldered or sintered onto a metallized ceramic substrate, with electrical contacting on the top using wire bonding technology. For encapsulation, the semiconductor can be encapsulated with a plastic. Regardless of the type of semiconductor, the current packaging and connection technology (housing, potting compound and terminal contacts) can only be operated at temperatures of up to 200 °C for a short time and up to 150 °C for a long time. In addition, the currently used housing materials have poor corrosion resistance and inappropriate thermal linear expansion.

To solve these problems, Fraunhofer IKTS is working on high temperature stable assemblies. For this purpose, the semiconductor components are embedded in a multilayer ceramic package under ceramic-specific firing temperatures, sintered and simultaneously electrically and thermally contacted. Integration in ceramic or ceramic-compatible materials represents a high-temperature-stable packaging technology that allows the potential of the wide bandgap semiconductor materials used (switchable currents/current densities, maximum operating temperatures, device miniaturization) to be exploited to the full.

The SiC semiconductor device is integrated into a pre-metallized and pre-structured green film stack using ceramic green films. A monolithic ceramic pre-package with embedded SiC device and ceramic-integrated electrical rewiring is produced by pressure-assisted sintering of the ceramic.

Depending on the temperature stability of the semiconductors, various ceramic materials are available for embedding the semiconductor devices. Embedding in an LTCC-based dielectric base ceramic (Low Temperature Cofired Ceramics) is currently performed at minimum sintering temperatures of 750 °C with a holding time of 2 h. However, the high temperature load on the contact metallization of the semiconductor devices during the sintering process can lead to degradation or limitation of the electrical performance of the semiconductor devices. Further development of the manufacturing process using the dielectric ULTCC (Ultra Low Temperature Cofired Ceramics) base materials developed at Fraunhofer IKTS allow a further reduction of the sintering temperature to 480 °C with a holding time of 30 min.

© Fraunhofer IKTS
FESEM image of an embedded SiC dummy chip in LTCC in cross-section.
© Fraunhofer IKTS
X-ray micrograph of an embedded chip with contact metallization in LTCC.
© Fraunhofer IKTS
Embedding of a dummy chip in ULTCC.

Further investigations are currently focused on the development of ULTCC adapted metallization pastes and on the verification of the process with real semiconductor devices (diodes, transistors) as well as the characterization of their switching behavior under elevated operating temperatures. 

Technical data

  • High-temperature-stable, organic-free packaging technology for power semiconductors (Top >> 200 °C) in manufacturing technology suitable for mass production (LTCC, ULTCC)
  • All-ceramic embedding of (SiC) semiconductor devices by means of multilayer ceramic technology-pre-package assembly
  • Embedding technologies based on materials of different sintering temperatures to reduce the temperature load on the semiconductor. (750 °C / 480 °C)

Services offered

  • Requirement-specific development of high-temperature stable ceramic packages
  • Sample production
  • Technology transfer