Integration of photo-imaging technology (PI) and microvias in LTCC for high-frequency applications

The next generation of 5G, 6G, and radar technologies demands ever finer, more compact, and more powerful LTCC structures. Fraunhofer IKTS is setting new standards in this field. Using state-of-the-art photo imaging (PI) technology, we achieve resolutions down to 20 µm in the co-firing process, opening up completely new possibilities for high-performance RF designs in ceramics.

For reliable micro multilayer ceramic structures, we are developing a complete, robust process chain that combines high-precision PI fineline metallization with microvias measuring 30–50 µm in diameter. We use picosecond laser drilling or laser punching for the reproducible production of these extremely small through-holes. In addition, we use specially developed, shrinkage-adjusted silver viafill pastes with optimized rheological properties that ensure reliable electrical contact.

Particularly noteworthy is our laser direct imaging (LDI) process, which enables outstanding structural quality while allowing local compensation for material shrinkage that occurs during sintering. The result is high-precision microstructures that offer exactly the geometric perfection required by modern high-frequency circuits.

The use of commercial material systems, such as Celanese's LTCC material system Micromax™ 951 and Vibrantz's A6ME, also offers the possibility of technology transfer to industrial manufacturers.

A daisy chain-based test layout was developed and corresponding demonstrators were manufactured to evaluate the entire process chain. These contain through-plated holes with diameters of 30 and 50 µm. The top side was structured using screen printing with conductor tracks and pads, while the buried conductor tracks were designed as PI-based fineline metallization with widths of 30, 40, and 50 µm. The electrical resistance of the daisy chain was measured for evaluation purposes. The analysis took into account possible process-related positioning errors that could lead to misalignment of the stack. Non-destructive testing using high-resolution X-ray microscopy confirmed well-filled microvias and precise alignment with the conductor tracks.

• Resolution PI structures ≥ 20 µm (unsintered)
• Minimum vias diameter achieved (unsintered):
  • GT951 30 µm
  • A6ME 50 µm
• Surface resistance of Ag-PI metallization ≤ 5 mΩ/cm²

• Implementation of complete demonstration structures to verify process capability and manufacturing quality
• Technology development based on commercial LTCC material systems
• Requirement-specific development of co-sinterable PI pastes